This invention relates to a fabrication method of a semiconductor device, and more particularly to a fabrication method of a semiconductor device having a multilayer wiring line structure wherein an insulating film having a dielectric constant lower than that of a silicon (Si) oxide film is used as an interlayer insulating film.
In a multilayer wiring line structure of a CMOS semiconductor device, the problem of signal propagation delay has become conspicuous together with requirements for high speed processing and low power consumption of a device in recent years. In order to suppress increase of the signal propagation delay, it is necessary to achieve reduction in resistance of wiring lines and capacitance between wiring lines and capacitance between wiring line layers.
As regards reduction in resistance of wiring lines, a semiconductor device which uses copper (Cu) wiring lines having a resistance lower than that of conventionally used aluminum alloy wiring lines is practically used.
Meanwhile, as regards reduction in capacitance between wiring lines and in capacitance between wiring line layers, a silicon oxide film having a dielectric constant higher than 4 has formerly been used as an interlayer insulating film. However, a SiOC film having a dielectric constant of approximately 3 has been placed into practical use in accordance with a request for reduction of the dielectric constant. Further, in recent years, a multilayer wiring line structure wherein a SiOC film is used as an interlayer insulating film has been placed into practical use.
The SiOC film is formed by a plasma CVD method (Chemical Vapor Deposition) and contains a methyl (CH3) group whose polarizability is lower than that of oxygen (O) so that the dielectric constant may be lowered from that of SiO2 films. However, since refinement of semiconductor devices in the future is estimated, it is necessary to reduce the dielectric constant of interlayer insulating films to a level lower than 2.5 and to further increase the introduction ratio of a CH3 group.
A method of reducing the dielectric constant of interlayer insulating films to a level lower than 2.5 has been proposed. In the method, another member which serves as a source of holes called porogen is introduced into solution for an organic film such as methylsilsesquioxane (MSQ) to form an organic film and then the porogen is removed by heat treatment or the like. As holes are introduced into the organic film, the film density of the interlayer film becomes coarser and reduction of the dielectric constant can be anticipated. For the film formation, both of a rotary application method and a plasma CVD method have been proposed.
Further, as another method of reducing the dielectric constant of interlayer insulating films to a level lower than 2.5, it has been proposed to form a CF film by a plasma CVD method. The fluorine (F) is an element whose polarizability is very low and is effective to reduce the dielectric constant, and where a CF film is used, an interlayer insulating film having a dielectric constant of approximately 2 can be obtained without introducing holes therein. The method is disclosed, for example, in Japanese Patent Laid-Open No. Hei 10-144675 (hereinafter referred to as Patent Document 1).